
AgentIC is an autonomous silicon compiler that transforms natural language specifications into production-ready GDSII layouts. It leverages a hierarchical, self-healing pipeline powered by advanced LLMs and industry-standard EDA tools like OpenLane, Verilator, and Yosys. The system automates architectural planning, recursive hierarchy expansion, parallel RTL generation, and closed-loop syntax fixing. By integrating multi-PDK support (from Sky130 to advanced process nodes) and formal verification (SVA), AgentIC bridges the gap between high-level intent and physical realization. It enables autonomous "Hardware-Software Co-Design," debugging and optimizing RTL until it meets strict manufacturing constraints, democratizing advanced chip design for the AI era.
10 May 2026